Lib.rs

› Hardware support › RustHDL
#high-level-synthesis #fpga #verilog #hardware

rust-hdl-hls

by Samit Basu and 3 contributors

4 releases (2 breaking)

0.46.0 Jul 2, 2023
0.45.1 Apr 4, 2023
0.45.0 Apr 1, 2023
0.44.2 Mar 25, 2023

#2012 in Hardware support

Download history 9/week @ 2024-07-23 60/week @ 2024-07-30 23/week @ 2024-08-06 14/week @ 2024-08-13 12/week @ 2024-08-20 20/week @ 2024-08-27 18/week @ 2024-09-03 23/week @ 2024-09-10 18/week @ 2024-09-17 50/week @ 2024-09-24 29/week @ 2024-10-01 10/week @ 2024-10-08 12/week @ 2024-10-15 13/week @ 2024-10-22 14/week @ 2024-10-29 10/week @ 2024-11-05

56 downloads per month
Used in 13 crates (3 directly)

MIT and AGPL-3.0-only

580KB
14K SLoC

Write firmware for FPGAs in Rust - High Level Synthesis crate

Dependencies

~8.5MB
~152K SLoC