Lib.rs

› Hardware support › RustHDL
#fpga #verilog #hardware

rust-hdl-sim

by Samit Basu and 3 contributors

4 releases (2 breaking)

0.46.0 Jul 2, 2023
0.45.1 Apr 4, 2023
0.45.0 Apr 1, 2023
0.44.2 Mar 25, 2023

#1986 in Hardware support

Download history 12/week @ 2024-07-22 25/week @ 2024-07-29 23/week @ 2024-08-05 15/week @ 2024-08-12 10/week @ 2024-08-19 22/week @ 2024-08-26 20/week @ 2024-09-02 28/week @ 2024-09-09 15/week @ 2024-09-16 51/week @ 2024-09-23 37/week @ 2024-09-30 4/week @ 2024-10-07 18/week @ 2024-10-14 15/week @ 2024-10-21 12/week @ 2024-10-28 12/week @ 2024-11-04

57 downloads per month
Used in 13 crates (3 directly)

MIT and AGPL-3.0-only

590KB
14K SLoC

Write firmware for FPGAs in Rust - Simulation crate

Dependencies

~8.5MB
~152K SLoC