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#3 in Rendering engine

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Used in image_dds


1.5K SLoC

Contains (static library, 7.5MB) libkernelx86_64-unknown-linux-gnu.a, (static library, 5MB) kernelx86_64-pc-windows-msvc.lib, (static library, 6MB) src/ispc/libkernelx86_64-apple-darwin.a, (static library, 3MB) libkernel_astcx86_64-unknown-linux-gnu.a, (static library, 2MB) kernel_astcx86_64-pc-windows-msvc.lib, (static library, 2MB) libkernel_astcx86_64-apple-darwin.a and 15 more.

Rust bindings for ISPC Texture Compressor

Latest version Documentation CI MIT APACHE2 Contributor Covenant



This is a forked crate from from Graham Wihlidal's rust bindings repo for the ISPC texture compressor. The fork includes updates to the latest Intel ISPC texture compression, as well as some patches that were required to make it useful in production.

State of the art texture compression for BC6H, BC7, ETC1, ASTC and BC1/BC3.

ISPC and libclang are not required, unless regenerating the ISPC kernels:

$ cargo build --features=ispc

For convenience, ISPC binaries for macOS, Linux, and Windows are in the repository (but not the crate).

Additionally, libclang exists in the LLVM installer for Windows, also included. https://github.com/gwihlidal/intel-tex-rs/tree/master/dependencies

Supported compression formats:

  • BC1, BC3 (aka DXT1, DXT5) and BC4, BC5 (aka ATI1N, ATI2N)
  • BC6H (FP16 HDR input)
  • BC7
  • ETC1

Pending compression formats:

  • ASTC (LDR, block sizes up to 8x8)
    • Work in progress


Add this to your Cargo.toml:

intel_tex_2 = "0.3.0"


$ cargo run --release --example main

Width is 4096
Height is 4096
ColorType is RGB(8)
Converting RGB -> RGBA
Block count: 1048576
Compressing to BC7...
Saving lambertian.dds file


Licensed under either of

at your option.


Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in this crate by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

Contributions are always welcome; please look at the issue tracker to see what known improvements are documented.

Code of Conduct

Contribution to the intel_tex_2 crate is organized under the terms of the Contributor Covenant, the maintainers of intel_tex_2, Traverse Research BV, promise to intervene to uphold that code of conduct.