#nxp #imxrt

no-std imxrt-ral

Register access layer for all NXP i.MX RT microcontrollers

14 releases

new 0.6.0 Dec 3, 2024
0.5.3 Aug 21, 2023
0.5.1 Jul 3, 2023
0.5.0 Dec 27, 2022
0.1.0 Feb 11, 2020

#250 in Embedded development

Download history 116/week @ 2024-08-12 1109/week @ 2024-08-19 116/week @ 2024-08-26 329/week @ 2024-09-02 182/week @ 2024-09-09 306/week @ 2024-09-16 688/week @ 2024-09-23 325/week @ 2024-09-30 314/week @ 2024-10-07 537/week @ 2024-10-14 632/week @ 2024-10-21 649/week @ 2024-10-28 557/week @ 2024-11-04 545/week @ 2024-11-11 599/week @ 2024-11-18 797/week @ 2024-11-25

2,538 downloads per month
Used in 11 crates (7 directly)

MIT/Apache

23MB
654K SLoC

imxrt-ral

A Rust register access layer (RAL), and SVD patches for NXP i.MX RT processors.

All Checks Crates.io

API Docs (main branch)

Goals

  • Simple but useful register level access. It compiles quickly, and it's intuitive for existing embedded developers.
  • RTIC support.

Getting Started

The imxrt-ral is a lower-level interface for i.MX RT processor registers with useful macros. The imxrt-ral is modeled after the stm32ral crate. It provides direct access to the processor's registers. Use the imxrt-ral if you'd like to create your own hardware abstraction layer, or a custom driver.

The imxrt-ral supports these i.MX RT processors:

  • "imxrt1011"
  • "imxrt1015"
  • "imxrt1021"
  • "imxrt1051"
  • "imxrt1052"
  • "imxrt1061"
  • "imxrt1062"
  • "imxrt1064"
  • "imxrt1176_cm4"
  • "imxrt1176_cm7"

The RAL also requires a feature flag to specify the processor variant. The RAL is on crates.io. The RAL provides the "rt" feature flag, and the interrupt table definition, that's used by the HAL.

Q/A

Why not use svd2rust to generate a crate for register access?

See here and here. svd2rust generates a crate that's nearly 1 million lines of Rust code, and it takes a few minutes to compile. On the other hand, the RAL compiles in a few seconds. Additionally, svd2rust only supports one SVD input, but the RAL auto-generation script accepts multiple SVD inputs, sharing the common peripherals across processor families. This means that we can more easily support all i.MX RT processor variants from a single crate.

Contributing & Development

For contributions and development guidance, see CONTRIBUTING.md

License

Licensed under either of

at your option.

Dependencies