Cyclone-V

A crate to interface with the Cyclone V FPGA. This adds types and functions to access all registers and address maps from the HPS side of a Cyclone-V.

See https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/index_frames.html for more documentation about the registers.

Limitations

This crate does not cover 100% of the Cyclone V HPS registers. Hopefully as more people use this crate more registers will be added.

lib.rs:

Types for Cyclone V devices. Derived from https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/index_frames.html

These types are used to access the FPGA Manager registers and other Cyclone V specific registers. The code should be platform-agnostic to allow for tests. This means no assembly or architecture specific libraries.