33 stable releases (5 major)
new 5.1.5 | Feb 21, 2021 |
---|---|
5.1.2 | Jan 4, 2021 |
5.1.0 | Dec 23, 2020 |
5.0.1 | Nov 27, 2020 |
0.1.3 | Apr 19, 2018 |
#14 in Embedded development
802 downloads per month
Used in 2 crates
(via aarch64)
110KB
1.5K
SLoC
cortex-a
Low level access to Cortex-A processors.
Currently Supported Architectures
- AArch64
- AArch32
Minimum Supported Rust Version
Requires rustc 1.45.0 or later due to use of the new asm!()
syntax.
Usage
Example from https://github.com/rust-embedded/rust-raspi3-OS-tutorials
unsafe fn el2_to_el1_transition() -> ! {
// Enable timer counter registers for EL1.
CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
// No offset for reading the counters.
CNTVOFF_EL2.set(0);
// Set EL1 execution state to AArch64.
HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
// Set up a simulated exception return.
SPSR_EL2.write(
SPSR_EL2::D::Masked
+ SPSR_EL2::A::Masked
+ SPSR_EL2::I::Masked
+ SPSR_EL2::F::Masked
+ SPSR_EL2::M::EL1h,
);
Disclaimer
Descriptive comments in the source files are taken from the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.
License
Licensed under either of
- Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
- MIT License (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.
Dependencies
~74KB