volatile-register

Volatile access to memory mapped hardware registers

Documentation

License

Licensed under either of

• Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
• MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

lib.rs:

Volatile access to memory mapped hardware registers

Usage

use volatile_register::RW;

// Create a struct that represents the memory mapped register block
/// Nested Vector Interrupt Controller
#[repr(C)]
pub struct Nvic {
    /// Interrupt Set-Enable
    pub iser: [RW<u32>; 8],
    reserved0: [u32; 24],
    /// Interrupt Clear-Enable
    pub icer: [RW<u32>; 8],
    reserved1: [u32; 24],
    // .. more registers ..
}

// Access the registers by casting the base address of the register block
// to the previously declared `struct`
let nvic = 0xE000_E100 as *const Nvic;
// Unsafe because the compiler can't verify the address is correct
unsafe { (*nvic).iser[0].write(1) }