#pac #mpfs #polarfire #no-alloc

no-std mpfs-pac

Peripheral Access Crate for PolarFire SoC

3 unstable releases

0.2.0 Jan 20, 2025
0.1.1 Dec 8, 2024
0.1.0 Dec 8, 2024

#448 in Hardware support

Download history 217/week @ 2024-12-04 122/week @ 2024-12-11 31/week @ 2024-12-18 18/week @ 2024-12-25 30/week @ 2025-01-01 37/week @ 2025-01-08 106/week @ 2025-01-15 6/week @ 2025-01-22 9/week @ 2025-02-05

126 downloads per month
Used in 2 crates (via mpfs-hal)

MIT license

2.5MB
48K SLoC

C 45K SLoC // 0.2% comments Forge Config 1K SLoC GNU Style Assembly 850 SLoC // 0.3% comments Python 445 SLoC // 0.3% comments Rust 217 SLoC // 0.4% comments Shell 4 SLoC // 0.3% comments

MPFS PAC

This is a Peripheral Access Crate (PAC) for the Microchip PolarFire SoC. It is build on the Mirochip-provided platform and bindgen.

Because of this approach, this is a fairly gnarly PAC, with no structure to speak of. On the flip side, there's a lot of advanced functionality available. See https://github.com/polarfire-soc/polarfire-soc-bare-metal-examples for usage examples for the platform.

Currently only the BeagleV-Fire board is supported, but adding new boards is a matter of adding the board-specific files to the mpfs-platform/boards directory and enabling it through a feature flag in build.rs.

Usage

You should almost certainly use this with the mpfs-hal crate, which - if nothing else - provides macros for entrypoints. If you don't want to use the HAL, you must define of the following entrypoints yourself (one for each hart):

  • u54_1
  • u54_2
  • u54_3
  • u54_4

TODO

There's lots of functionality in platform that isn't yet exposed, either because they are static functions, or defines that aren't recognized by bindgen. I also haven't added all headers to the wrapper, since I've been adding them as I need them.

The docs for this crate are a broken, presumably due to some bindgen issue.

Dependencies

~0.5–3.5MB
~67K SLoC