|0.6.0-alpha.2||Apr 8, 2021|
|0.6.0-alpha.1||Mar 4, 2021|
|0.6.0-alpha.0||Nov 14, 2020|
|0.5.6||Mar 3, 2021|
|0.5.3||Jun 12, 2020|
#10 in Concurrency
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A concurrency framework for building real-time systems.
Formerly known as Real-Time For the Masses.
Tasks as the unit of concurrency [^1]. Tasks can be event triggered (fired in response to asynchronous stimuli) or spawned by the application on demand.
Message passing between tasks. Specifically, messages can be passed to software tasks at spawn time.
A timer queue [^2]. Software tasks can be scheduled to run at some time in the future. This feature can be used to implement periodic tasks.
Support for prioritization of tasks and, thus, preemptive multitasking.
Efficient and data race free memory sharing through fine grained priority based critical sections [^1].
Deadlock free execution guaranteed at compile time. This is an stronger guarantee than what's provided by the standard
Minimal scheduling overhead. The task scheduler has minimal software footprint; the hardware does the bulk of the scheduling.
Highly efficient memory usage: All the tasks share a single call stack and there's no hard dependency on a dynamic memory allocator.
All Cortex-M devices are fully supported.
This task model is amenable to known WCET (Worst Case Execution Time) analysis and scheduling analysis techniques. (Though we haven't yet developed Rust friendly tooling for that.)
Applications must be written using the 2018 edition.
Join us and talk about RTIC in the Matrix room.
Weekly meeting notes can be found over at HackMD
New features and big changes should go through the RFC process in the dedicated RFC repository.
[^1]: Eriksson, J., Häggström, F., Aittamaa, S., Kruglyak, A., & Lindgren, P. (2013, June). Real-time for the masses, step 1: Programming API and static priority SRP kernel primitives. In Industrial Embedded Systems (SIES), 2013 8th IEEE International Symposium on (pp. 110-113). IEEE.
[^2]: Lindgren, P., Fresk, E., Lindner, M., Lindner, A., Pereira, D., & Pinho, L. M. (2016). Abstract timers and their implementation onto the arm cortex-m family of mcus. ACM SIGBED Review, 13(1), 48-53.
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