Arm Generic Interrupt Controller driver

This crate provides a Rust driver for the Arm Generic Interrupt Controller version 3 or 4 (GICv3 and GICv4).

Currently it only supports AArch64. Patches are welcome to add support for AArch32 and other GIC versions.

This is not an officially supported Google product.

License

Licensed under either of

• Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
• MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)

at your option.

Contributing

If you want to contribute to the project, see details of how we accept contributions.

lib.rs:

Driver for the Arm Generic Interrupt Controller version 3 or 4, on aarch64.

This top level module contains functions that are not specific to any particular interrupt controller, as support for other GIC versions may be added in future.

Example

use arm_gic::{
    gicv3::{GicV3, IntId, SgiTarget},
    irq_enable,
};

// Base addresses of the GICv3 distributor and redistributor.
const GICD_BASE_ADDRESS: *mut u64 = 0x800_0000 as _;
const GICR_BASE_ADDRESS: *mut u64 = 0x80A_0000 as _;

// Initialise the GIC.
let mut gic = unsafe { GicV3::new(GICD_BASE_ADDRESS, GICR_BASE_ADDRESS) };
gic.setup();

// Configure an SGI and then send it to ourself.
let sgi_intid = IntId::sgi(3);
GicV3::set_priority_mask(0xff);
gic.set_interrupt_priority(sgi_intid, 0x80);
gic.enable_interrupt(sgi_intid, true);
irq_enable();
GicV3::send_sgi(
    sgi_intid,
    SgiTarget::List {
        affinity3: 0,
        affinity2: 0,
        affinity1: 0,
        target_list: 0b1,
    },
);