#register #cortex-m #reader-writer #renesas #no-std #fsp

no-std ra6m3-fsp-pac

Peripheral access API for RA6M3 microcontrollers (generated using svd2rust)

2 releases

new 0.1.4 May 23, 2025
0.1.3 May 22, 2025

#582 in Embedded development

Download history 57/week @ 2025-05-17

57 downloads per month
Used in ra-fsp-rs

MIT/Apache

9MB
213K SLoC

RA6M3 Peripheral Access Crate

A Peripheral Access API (PAC) for RA6M3 microcontrollers, generated using svd2rust.

This crate provides low‑level register and bitfield definitions for all on‑chip peripherals.
It is designed to preserve the familiar cortex-m-rt interface while handling RA6M3‑specific initialization requirements.


Features

  • rt: Includes IV in ".application_vectors" section. Does not enable any runtime. Either use ra-fsp-sys or cortex-m-rt/device.
  • fsp: places IV in ".application_vectors" section. You still need to add ra-fsp-sys/@name@ or ra-fsp-rs/@name@ crate to your dependencies.
  • cortex-m-rt-device: places IV in ".vector_table.interrupts" section and enables cortex-m-rt/device feature.

Installation

Add this crate to your Cargo.toml:

[dependencies]
ra6m3_pac = "0.*"

To enable the FSP‑based runtime:

[dependencies]
ra6m3_pac = { version = "0.*", features = ["rt", "fsp"] }
ra_fsp-sys = { version = "0.*", features = ["@name@"] }

Usage

This PAC has equivalent interface to any cortex-m-rt/device-compatible PAC, thus the code is looking exactly the same. You can use an OS like RTIC or just:

#![no_std]
#![no_main]

use cortex_m_rt::entry;
use ra6m3_pac::Peripherals;

#[entry]
fn main() -> ! {
    let p = Peripherals::take().unwrap();
    // Configure and use peripherals...
    loop {}
}

Note: FSP manages interrupt vectors, invokes SystemInit, and
then calls main. cortex-m-rt::entry can still be used, but cortex-m-rt/device
feature cannot be enabled, as FSP is responsible for the vector table and Reset.

Security Considerations

RA6M3 devices support ID code protection via the OSIS register:

  • The OSIS register stores a 128-bit ID code used for authentication when
    connecting a debugger or serial programmer.
  • If the ID codes do not match, the device remains locked and prohibits external
    access.
  • A special linker script and startup procedure are required to configure the
    OSIS register safely and avoid accidental locking of the MCU.

This crate’s rt feature uses the manufacturer‑provided FSP to handle ID code
setup in SystemInit. Do not rewrite or bypass this logic unless you fully understand the implications.

Contributing

Contributions are welcome! Please open an issue or pull request in this repository. Follow these guidelines:

  1. Synchronize register definitions from the latest SVD.
  2. Keep changes minimal—only update what’s necessary.
  3. Always test on real hardware.

License

Licensed under either of

at your option.

Dependencies