#x86-64 #vcpu #hypervisor #arceos

nightly no-std x86_vcpu

x86 Virtual CPU implementation for the Arceos Hypervisor

4 releases

Uses new Rust 2024

new 0.2.1 Feb 9, 2026
0.2.1-preview.1 Feb 8, 2026
0.2.0 Feb 3, 2026
0.1.0 Aug 18, 2025

#262 in No standard library

Download history 142/week @ 2025-10-29 205/week @ 2025-11-05 16/week @ 2025-11-12 19/week @ 2025-11-26 74/week @ 2026-01-28 154/week @ 2026-02-04

228 downloads per month
Used in 2 crates (via axvm)

Apache-2.0

165KB
3K SLoC

x86_vcpu

CI

Definition of the vCPU structure and virtualization-related interface support for x86_64 architecture.

The crate user must implement the AxVCpuHal trait to provide the required low-level implementantion, relevant implementation can refer to axvcpu. [Work in Progress]

Features

  • VMX Support: Complete Intel VT-x virtualization support
  • SVM Support: AMD SVM (Secure Virtual Machine) virtualization support (feature flag svm)
  • Register Management: Comprehensive x86 register state management
  • EPT (Extended Page Tables): Memory virtualization support
  • MSR Handling: Model-Specific Register access and management
  • VMCS Management: Virtual Machine Control Structure operations
  • Interrupt Handling: Virtual interrupt and exception processing
  • Tracing Support: Optional tracing for debugging (feature flag tracing)

Architecture

The library is structured into several key modules:

Core Components

  • vmx/: Intel VMX virtualization implementation

    • vcpu.rs: Virtual CPU implementation (VmxArchVCpu)
    • vmcs.rs: VMCS (Virtual Machine Control Structure) management
    • percpu.rs: Per-CPU state management (VmxArchPerCpuState)
    • definitions.rs: VMX constants and exit reasons
    • instructions.rs: VMX instruction wrappers
    • structs.rs: VMX data structures
  • regs/: Register management

    • accessors.rs: Register access utilities
    • diff.rs: Register state comparison
    • mod.rs: General-purpose registers (GeneralRegisters)
  • ept.rs: Extended Page Tables implementation

  • msr.rs: Model-Specific Register handling

Key Types

Basic Example

use x86_vcpu::{has_hardware_support, GeneralRegisters};

// Check if VMX is supported on this hardware
if has_hardware_support() {
    println!("VMX hardware support detected");
} else {
    println!("VMX hardware support not available");
}

// Create and initialize guest registers
let mut regs = GeneralRegisters::default();
regs.rax = 0x1234;
regs.rbx = 0x5678;

println!("Guest registers initialized:");
println!("RAX: {:#x}", regs.rax);
println!("RBX: {:#x}", regs.rbx);

// Display register names
for (i, name) in GeneralRegisters::REGISTER_NAMES.iter().enumerate() {
    println!("Register {}: {}", i, name);
}

Features

The library supports the following Cargo features:

  • default: Enables VMX support by default
  • vmx: Intel VMX (VT-x) support
  • svm: AMD SVM support
  • tracing: Enable tracing for debugging
  • ArceOS - An experimental modular OS (or Unikernel)
  • AxVisor - Hypervisor implementation

License

X86_vcpu is licensed under the Apache License, Version 2.0. See the LICENSE file for details.

Dependencies

~8MB
~129K SLoC