#circuit #gate #logic #ttl #simulating #computer

rslogicsim

A logic gate/circuit simulator written in Rust

2 releases

0.1.3 Jun 16, 2024
0.1.1 Jun 15, 2024

#111 in Simulation

MIT license

26KB
451 lines

rsLogicSim - Logic Simulator

What is this?

rsLogicSim is a library designed to simulate various logic gates and circuits. It could be used for any number of applications, such as simulating a TTL based computer.

Building

cargo build

Testing

cargo test

No runtime deps