Lib.rs

Cargo Features

[dependencies]
esp-backtrace = { version = "0.13.0", default-features = false, features = ["esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32p4", "esp32s2", "esp32s3", "println", "defmt", "print-float-registers", "colors", "halt-cores", "panic-handler", "semihosting"] }

default = colors

The colors feature is set by default whenever esp-backtrace is added without default-features = false somewhere in the dependency tree.

esp32 = print-float-registers

You must enable exactly one of the below features to support the correct chip:

Enables esp32 of optional esp-println, openocd-semihosting of optional semihosting

esp32c2

Enables esp32c2 of optional esp-println

esp32c3

Enables esp32c3 of optional esp-println

esp32c6

Enables esp32c6 of optional esp-println

esp32h2

Enables esp32h2 of optional esp-println

esp32p4

Enables esp32p4 of optional esp-println

esp32s2

Enables esp32s2 of optional esp-println and openocd-semihosting of optional semihosting

semihosting:

Xtensa-specific: Use OpenOCD Semihosting.

See readme for details.

esp32s3 = print-float-registers

Enables esp32s3 of optional esp-println, openocd-semihosting of optional semihosting

println

Use esp-println

Enables esp-println

defmt

Use defmt

Enables defmt

print-float-registers esp32? esp32s3?

TODO support esp32p4

Affects xtensa::Context.F64R_LO, xtensa::Context.F64R_HI, xtensa::Context.F64S, xtensa::Context.FCR, xtensa::Context.FSR, xtensa::Context.F0, xtensa::Context.F1, xtensa::Context.F2, xtensa::Context.F3, xtensa::Context.F4, xtensa::Context.F5, xtensa::Context.F10…

colors default

You may optionally enable one or more of the below features to provide additional functionality:

custom-halt exception-handler halt-cores

panic-handler

Features from optional dependencies

semihosting implicit feature

Enables semihosting

semihosting:

Semihosting for AArch64, ARM, RISC-V, MIPS32, MIPS64, and Xtensa