#crc #simd

crc32c

Safe implementation for hardware accelerated CRC32C instructions with software fallback

8 releases (5 breaking)

0.6.0 Jan 20, 2021
0.5.0 Jul 4, 2020
0.4.0 Jun 22, 2018
0.3.1 Apr 22, 2018
0.1.1 Sep 18, 2017

#68 in Algorithms

Download history 1380/week @ 2021-01-20 1672/week @ 2021-01-27 2243/week @ 2021-02-03 2159/week @ 2021-02-10 2288/week @ 2021-02-17 2065/week @ 2021-02-24 1601/week @ 2021-03-03 1809/week @ 2021-03-10 1580/week @ 2021-03-17 1551/week @ 2021-03-24 1426/week @ 2021-03-31 1522/week @ 2021-04-07 1811/week @ 2021-04-14 1601/week @ 2021-04-21 1005/week @ 2021-04-28 1350/week @ 2021-05-05

6,422 downloads per month
Used in 36 crates (11 directly)

Apache-2.0/MIT

18KB
390 lines

CRC32C

Crates.io Docs.rs Travis

Rust implementation of the CRC-32-Castagnoli algorithm with hardware acceleration where possible.

Hardware accelleration on the following architectures:

  1. x84-64 with SSE 4.2
    • All stable versions of Rust
    • If SSE 4.2 is enabled at compile time, it will only build the SSE implementation. Otherwise, the cpuid is used to find the best implementation at runtime.
  2. aarch64 with crc feature
    • Only available on nightly (enabled by default without feature)

All other processors utilize a software fallback.

Usage

First, add this to your Cargo.toml:

[dependencies]
crc32c = "0.6"
extern crate crc32c;

fn main() {
    let message = b"Hello world!";
    let crc = crc32c::crc32c(message);

    println!("hash = {}", crc);
}

License

You may use this code under either the Apache 2.0 license or the MIT license, at your option.

No runtime deps

~17KB